Fpga Team Lead

Description:

IC Resources is working with a pioneering satellite communications company at the forefront of enabling 5G connectivity from space. Their cutting-edge technology is driving energy-efficient, high-performance baseband processing for next-generation satellite systems. To support their continued innovation and global impact, they are seeking a Principal FPGA Team Lead to lead technical strategy and delivery of mission-critical IP across both FPGA and ASIC platforms.

This is a highly strategic yet hands-on role, perfect for an experienced engineering leader who thrives at the intersection of technical excellence and team leadership. The successful candidate will guide a talented engineering team in developing high-throughput Layer 1 IP, shape design methodologies, and work closely with executive stakeholders to align engineering delivery with long-term product vision.

As Principal FPGA Team Lead, you will provide technical direction, project oversight, and customer-facing expertise, while ensuring quality, scalability, and efficiency across the team’s output. This position offers the opportunity to make a direct impact on global connectivity by helping shape the next generation of satellite communication technology.

Key Responsibilities:

• Lead and grow a high-performing engineering team delivering digital signal processing IP for FPGA and ASIC platforms.

• Define technical direction and architecture, ensuring best-in-class RTL design and implementation.

• Oversee design execution, ensuring delivery quality, resource efficiency, and successful timing closure.

• Act as the technical interface with customers during both presales activities and development projects.

• Establish and evolve design, verification, and methodology best practices across the team.

Key Skills Required:

• Strong expertise in RTL design using Verilog/SystemVerilog for FPGA and ASIC applications.

• Demonstrated success in leading and mentoring engineering teams in high-performance environments.

• Solid experience in high-speed datapath and/or signal processing design.

• Knowledge of power-aware design practices, synthesis, and static timing analysis.

• Familiarity with project management approaches (Agile, Waterfall).

Desirable Skills:

• Knowledge of DSP algorithms such as ECC, beamforming, or channel estimation.

• Exposure to UVM-based verification and modelling in C++/SystemC.

• Understanding of Technology Readiness Levels (TRLs) and multidisciplinary systems architecture.

Why Join:
This role provides the chance to be part of a collaborative and ambitious team that is shaping the future of global communications. The company’s solutions have real-world impact, enhancing worldwide connectivity and driving forward the next era of satellite-enabled 5G networks.